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ARD2
1.00 for Rev B. Hardware
Airbag Reference Demonstrator using MPC5604P
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00001 00017 #ifndef CG147_DIAG_H_ 00018 #define CG147_DIAG_H_ 00019 00020 /* 00021 ************************************************************** 00022 * Defines, Macros and Typedefs 00023 **************************************************************/ 00024 /*** Constant Macros ***/ 00025 /* Default Yes and No defines */ 00026 #ifndef TRUE 00027 #define TRUE (1u) 00028 #endif 00029 #ifndef CLEAR 00030 #define CLEAR (0u) 00031 #endif 00032 #ifndef BITS_IN_NIBBLE 00033 #define BITS_IN_NIBBLE (4u) 00034 #endif 00035 #ifndef BITS_IN_BYTE 00036 #define BITS_IN_BYTE (8u) 00037 #endif 00038 #ifndef BYTES_IN_16 00039 #define BYTES_IN_16 (2u) 00040 #endif 00041 #ifndef BYTES_IN_32 00042 #define BYTES_IN_32 (4u) 00043 #endif 00044 #ifndef BIT_DEFINITION 00045 #define BIT_DEFINITION 00046 #define BIT0 (1u << 0u) 00047 #define BIT1 (1u << 1u) 00048 #define BIT2 (1u << 2u) 00049 #define BIT3 (1u << 3u) 00050 #define BIT4 (1u << 4u) 00051 #define BIT5 (1u << 5u) 00052 #define BIT6 (1u << 6u) 00053 #define BIT7 (1u << 7u) 00054 #define BIT8 (1u << 8u) 00055 #define BIT9 (1u << 9u) 00056 #define BIT10 (1u << 10) 00057 #define BIT11 (1u << 11) 00058 #define BIT12 (1u << 12) 00059 #define BIT13 (1u << 13) 00060 #define BIT14 (1u << 14) 00061 #define BIT15 (1u << 15) 00062 #define BIT16 (1u << 16) 00063 #define BIT17 (1u << 17) 00064 #define BIT18 (1u << 18) 00065 #define BIT19 (1u << 19) 00066 #define BIT20 (1u << 20) 00067 #define BIT21 (1u << 21) 00068 #define BIT22 (1u << 22) 00069 #define BIT23 (1u << 23) 00070 #define BIT24 (1u << 24) 00071 #define BIT25 (1u << 25) 00072 #define BIT26 (1u << 26) 00073 #define BIT27 (1u << 27) 00074 #define BIT28 (1u << 28) 00075 #define BIT29 (1u << 29) 00076 #define BIT30 (1u << 30) 00077 #define BIT31 (1u << 31) 00078 #endif 00079 00080 /* Limits for POM tests */ 00081 #define SBC_TEST_VER_CAP_LIMIT_LO ((uint16_t)(((2.4 - 2.2) / 3.3) * 1024u)) 00082 #define SBC_TEST_VER_ESR_LIMIT_LO ((uint16_t)(((2.4 - 2.4) / 3.3) * 1024u)) 00083 #define SBC_TEST_VER_POL_LIMIT_LO ((uint16_t)(((2.4 - 2.2) / 3.3) * 1024u)) 00084 00085 #define SBC_TEST_VER_CAP_LIMIT_HI ((uint16_t)(((2.4 - 1.0) / 3.3) * 1024u)) 00086 #define SBC_TEST_VER_ESR_LIMIT_HI ((uint16_t)(((2.4 - 1.0) / 3.3) * 1024u)) 00087 #define SBC_TEST_VER_POL_LIMIT_HI ((uint16_t)(((2.4 - 1.0) / 3.3) * 1024u)) 00088 00089 /* Limits for FLM leakage tests, 5% away from the target accepted */ 00090 #define SBC_TEST_FLM_LEAK_LIMIT_LO ((uint16_t)(((1.1 * 0.95) / 3.3) * 1024u)) 00091 #define SBC_TEST_FLM_LEAK_LIMIT_HI ((uint16_t)(((1.1 * 1.05) / 3.3) * 1024u)) 00092 #define SBC_TEST_FLM_LOWLEAK_LIMIT_LO ((uint16_t)(((0.38 * 5 * 0.95) / 3.3) * 1024u)) 00093 #define SBC_TEST_FLM_LOWLEAK_LIMIT_HI ((uint16_t)(((0.38 * 5 * 1.05) / 3.3) * 1024u)) 00094 00095 /* Limits for SQUIB resistance tests, 0.4Ohm until 6.8Ohm accepted */ 00096 #define SBC_SQUIB_RESISTANCE_LIMIT_HI 68u 00097 #define SBC_SQUIB_RESISTANCE_LIMIT_LO 4u 00098 00099 /* Nominal values */ 00100 #define SBC_SQREF_RESISTANCE (68u) 00101 00102 /* Limits for AIN ADC tests */ 00103 #define SBC_TEST_AINADC_VAS_SET_LIMIT_LO 118u 00104 #define SBC_TEST_AINADC_VAS_SET_LIMIT_HI 140u 00105 #define SBC_TEST_AINADC_REF_BG_LIMIT_LO 123u 00106 #define SBC_TEST_AINADC_REF_BG_LIMIT_HI 132u 00107 #define SBC_TEST_AINADC_REF_BG2_LIMIT_LO 253u 00108 #define SBC_TEST_AINADC_REF_BG2_LIMIT_HI 255u 00109 #define SBC_TEST_AINADC_REF_23BG2_LIMIT_LO 166u 00110 #define SBC_TEST_AINADC_REF_23BG2_LIMIT_HI 174u 00111 #define SBC_TEST_AINADC_AGND_LIMIT_LO 0u 00112 #define SBC_TEST_AINADC_AGND_LIMIT_HI 3u 00113 00114 /* Limits for AIN MUX tests */ 00115 #define SBC_TEST_AINMUX_NOSWITCHCLOSED_LIMIT_LO 166u 00116 #define SBC_TEST_AINMUX_NOSWITCHCLOSED_LIMIT_HI 174u 00117 #define SBC_TEST_AINMUX_SWITCHGND_LIMIT_LO 0u 00118 #define SBC_TEST_AINMUX_SWITCHGND_LIMIT_HI 8u 00119 #define SBC_TEST_AINMUX_SWITCHAVST33_LIMIT_LO 253u 00120 #define SBC_TEST_AINMUX_SWITCHAVST33_LIMIT_HI 255u 00121 00122 #define SBC_TIMEOUT 0x5000000u 00123 00124 /* Errors for tests */ 00126 #define SBC_TEST_SCHEDULER_FAILED 0x80000000 00127 00128 #define SBC_TEST_UNEXPECTED_SPI_RESULT 0x40000000 00129 00130 #define SBC_TEST_LO_LIMIT_FAILED 0x20000000 00131 00132 #define SBC_TEST_HI_LIMIT_FAILED 0x10000000 00133 00134 #define SBC_TEST_FLM_RESISTANCE_FAILED 0x08000000 00135 00136 #define SBC_TEST_FLM_LOWLEAK_FAILED 0x04000000 00137 00138 #define SBC_TEST_FLM_LEAK_FAILED 0x02000000 00139 00140 #define SBC_TEST_DIS_ALP_FAILED 0x01000000 00141 00142 #define SBC_TEST_SBC_ADC_FAILED 0x00800000 00143 00144 #define SBC_TEST_SBC_MUX_NOSWITCH_FAILED 0x00400000 00145 00146 #define SBC_TEST_SBC_MUX_SWITCHGND_FAILED 0x00200000 00147 00148 #define SBC_TEST_SBC_MUX_SWITCHAVST33_FAILED 0x00100000 00149 00150 #define SBC_DIAG_CRITICAL_FAILURE (SBC_TEST_SCHEDULER_FAILED | \ 00151 SBC_TEST_UNEXPECTED_SPI_RESULT | \ 00152 SBC_TEST_DIS_ALP_FAILED | \ 00153 SBC_TEST_SBC_ADC_FAILED | \ 00154 SBC_TEST_SBC_MUX_NOSWITCH_FAILED | \ 00155 SBC_TEST_SBC_MUX_SWITCHGND_FAILED | \ 00156 SBC_TEST_SBC_MUX_SWITCHAVST33_FAILED) 00157 00158 00159 /*** Function Macros ***/ 00160 00161 /*** Enums ***/ 00162 00163 /*** TypeDefs ***/ 00164 /* 00165 ************************************************************** 00166 * Declarations 00167 **************************************************************/ 00168 /*** Const ***/ 00169 extern const uint8_t cu8SizeOfSBCTests; 00170 extern const uint8_t cu8SizeOfTestAnaHeadSettings; 00171 extern const uint8_t cau8SBCInitialTestAoutRoutesIGL[]; 00172 extern const uint8_t cau8SBCInitialTestAoutRoutesIGH[]; 00173 /*** Globals ***/ 00174 00175 /*** Static Globals ***/ 00176 00177 /* 00178 ************************************************************** 00179 * Function Prototypes 00180 **************************************************************/ 00181 /* 00182 ****************************************************************************** 00183 * 00184 * Function: u32fnSBCPerformInitialTestsPOM() 00185 * 00186 */ 00202 uint32_t u32fnSBCPerformInitialTestsPOM(const uint8_t u8ERx, 00203 const uint8_t u8TestIndex); 00204 /* 00205 ****************************************************************************** 00206 * 00207 * Function: u32fnSBCPerformInitialTestsFLM() 00208 * 00209 */ 00228 uint32_t u32fnSBCPerformInitialTestsFLM(const uint16_t cu16SquibMask); 00229 /* 00230 ****************************************************************************** 00231 * 00232 * Function: u32fnSBCFLMLeakageMeasP1() 00233 * 00234 */ 00247 uint32_t u32fnSBCFLMLeakageMeasP1(uint8_t u8IgnitionPin, 00248 uint8_t u8LowLeakage); 00249 /* 00250 ****************************************************************************** 00251 * 00252 * Function: u32fnSBCFLMLeakageMeasP2() 00253 * 00254 */ 00272 uint32_t u32fnSBCFLMLeakageMeasP2(uint8_t u8LowLeakage, uint8_t u8Counter, 00273 uint16_t* pu16Aout); 00274 /* 00275 ****************************************************************************** 00276 * 00277 * Function: u32fnSBCFLMResistanceMeasurement() 00278 * 00279 */ 00297 uint32_t u32fnSBCFLMResistanceMeasurement(const uint8_t u8IgnitionPinHigh, 00298 const uint8_t u8IgnitionPinLow, 00299 const uint8_t u8Counter); 00300 /* 00301 ****************************************************************************** 00302 * 00303 * Function: u32fnSBCTestMuxAndADC() 00304 * 00305 */ 00321 uint32_t u32fnSBCTestMuxAndADC(uint8_t u8TestIndex); 00322 /* 00323 ****************************************************************************** 00324 * 00325 * Function: u8fnCG147ReadAIn() 00326 * 00327 */ 00332 uint8_t u8fnCG147ReadAIn(const uint8_t cu8DSPIInstance1, 00333 const uint8_t cu8DSPIInstance2, 00334 const uint8_t cu8ChipSelect, 00335 const uint8_t cu8Step, 00336 const uint8_t cu8CG147Ch, 00337 uint16_t* pu16ADCResult, 00338 uint32_t* pu32Time); 00339 #endif /* CG147_DIAG_H_ */